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introduce verilog_sva_property_typet #1081

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@kroening kroening commented Apr 23, 2025

This introduces a type for Verilog SVA properties to distinguish properties from state predicates and sequences.

@kroening kroening force-pushed the verilog_sva_property_type branch from 9e75065 to d6241f6 Compare April 23, 2025 16:40
@kroening kroening force-pushed the verilog_sva_property_type branch 4 times, most recently from e0570e9 to 9b2f517 Compare May 13, 2025 19:58
@kroening kroening force-pushed the verilog_sva_property_type branch 2 times, most recently from 0905cf1 to 7b91923 Compare June 5, 2025 16:47
@kroening kroening force-pushed the verilog_sva_property_type branch 4 times, most recently from 4f0cf7d to 3eea81d Compare July 8, 2025 20:29
This introduces a type for Verilog SVA properties to distinguish properties
from state predicates and sequences.
@kroening kroening force-pushed the verilog_sva_property_type branch from 3eea81d to 0631311 Compare July 8, 2025 21:35
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